SY898535L precision differential 3.3v, low skew, 1:4 lvcmos/lvttl -to-lvpecl fanout buffer precision edge is a register ed trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 ( 408 ) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com general description the SY898535L is a 3.3v, low skew, 1:4 lvcmos/lvttl- to-lvpecl fanout buffer with two selectable single ended clock inputs. the clk0 and clk1 accept lvcmos or lvttl input levels and tran slate them to 3.3v lvpecl levels. to eliminate runt pulses on the outputs during asynchronous assertion/de-ass ertion of the clock enable pin, the clock enable is synchr onized with the input signal. the SY898535L operates from a 3.3v 5% supply and is guaranteed over the full industrial temperature range of ?40c to +85c. the SY898535L is part of micrel?s high- speed, precision edge ? product line. datasheets and support documentation can be found on micrel?s web site at: www.micrel.com . functional block diagram features ? provides four differential 3.3v lvpecl copies ? selects between single-ended clk0 or clk1 input ? clk0 and clk1 accept lvcmos or lvttl input levels ? guaranteed ac performance over temperature and supply voltage: 235mhz maximum output frequency <1.9ns propagation delay (in-to-q) <30ps output skew <250ps part-to-part skew additive phase jitter, rms: 0.09ps (typical) ? 3.3v 5% supply voltage ? ?40c to +85c industrial temperature operating range ? available in a 20-pin tssop package applications ? gigabit ethernet ? 10gigabit ethernet ? sonet/sdh ? pci markets ? lan/wan ? enterprise servers ? ate ? test and measurement june 2011 m9999-062211-b hbwhelp@micrel.com or (408) 955-1690
micrel, inc. SY898535L june 2011 2 m9999-062211-b hbwhelp@micrel.com or (408) 955-1690 ordering information (1) part number package type operating range package marking SY898535Lky k4-20-1 industrial 898535l with pb-free bar-line indicator SY898535Lkytr (2) k4-20-1 industrial 898535l with pb-free bar-line indicator notes: 1. contact factory for die availability. dice are guaranteed at t a = 25c, dc electricals only. 2. tape and reel. truth table inputs outputs clk_en clk_sel selected source q0 :q3 /q0:/q3 0 0 clk0 disabled : low disabled : high 0 1 clk1 disabled : low disabled : high 1 0 clk0 enabled enabled 1 1 clk1 enabled enabled
micrel, inc. SY898535L june 2011 3 m9999-062211-b hbwhelp@micrel.com pin configuration 20-pin tssop (k4-20-1) pin description pin number pin name pin function 1 v ee ground. 2 clk_en single-ended input: this ttl/cmos input dis ables and enables the q0-q3 outputs. it is internally connected to a 51k ? pull-up resistor and will default to a logic high state if left open. when disabled, q goes low and /q goes high. clk_en being synchronous, outputs will be enabled/disabled following a rising and a falling edge of the input clock. v th = is approximately 1.5v. 3 clk_sel single-ended input: this single-ended ttl/cmos-c ompatible input selects the input to the multiplexer. if high, selects clk1 input. when low, it selects clk0 input. note that this input is internally connected to a 51k ? pull-down resistor and will def ault to logic low state if left open. v th = is approximately 1.5v. 4 clk0 single-ended input: this lvcmos or lvttl signal is the input signal to the device. it is internally connected to a 51k ? pull-down resistor and will default to a logic low state if left open. this input is selected when clk_sel is set to logic low. 6 clk1 single-ended input: this lvcmos or lvttl signal is the input signal to the device. it is internally connected to a 51k ? pull-down resistor and will default to a logic low state if left open. this input is selected when clk_sel is set to logic high. 5, 7, 8, 9 nc unused pins 10, 13, 18 vcc positive power supply pins: bypass with 0.1f||0.01f low esr capacitors as close to the v cc pins as possible. 20, 19 17, 16 15, 14 12, 11 q0, /q0 q1, /q1 q2, /q2 q3, /q3 lvpecl differential output pairs: differential bu ffered output copies the selected input signal. the output swing is typically 800mv. unused output pairs may be left floating with no impact on jitter. these differential lvpecl outputs are a l ogic function of the clk0 and clk1 inputs. see ?truth table? below. or (408) 955-1690
micrel, inc. SY898535L june 2011 4 m9999-062211-b hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc ).................................... ?0.5v to +4.6v input voltage (v in ) ..................................?0.5v to v cc +0.5v lvpecl output current (i out ) ............................................. continuous............................................................50ma surge ..................................................................100ma lead temperature (solderi ng, 20 sec.).................... +260c storage temperature (t s ) ........................... ?65c to 150c operating ratings (2) supply voltage (v cc )............................ +3.135v to +3.465v ambient temperature (t a ) ...........................-40c to +85c package thermal resistance (3) tssop ( ja ) still-air ......................................................73.2c/w power supply dc electrical characteristics (4) v cc = 3.3v 5%; t a = -40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v cc power supply 3.135 3.3 3.465 v i ee power supply current no load, max v cc 55 ma lvcmos/lvttl dc electrical characteristics (4) v cc = 3.3v 5%; t a = -40c to +85c, unless otherwise stated. symbol parameter condition min typ max units clk0, clk1 2 v cc + 0.3v v v ih input high voltage clk_en, clk_sel 2 v cc + 0.3v v clk0, clk1 -0.3 1.3 v v il input low voltage clk_en, clk_sel -0.3 0.8 v clk0, clk1, clk_sel v in = v cc = 3.465v 150 a i ih input high current clk_en v in = v cc = 3.465v 5 a clk0, clk1, clk_sel v in = 0v, v cc = 3.465v -5 a i il input low current clk_en v in = 0v, v cc = 3.465v -150 a lvpecl dc electrical characteristics (4) v cc = 3.3v 5%; t a = -40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v oh output high voltage (5) v cc - 1.4 v cc ? 0.9 v v ol output low voltage (5) v cc ? 2.0 v cc - 1.7 v v swing peak-to-peak output voltage swing 0.6 1.0 v notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data shee t. exposure to absolute maximum rating con ditions for extended periods may affect device reliability. 2 . the data sheet limits are not guaranteed if t he device is operated beyond the operating ratings. 3. ja value is determined for a 4-layer board in still air unless otherwise stated. 4 . the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been establishe d. 5. 50 ? to v cc -2v terminated outputs.
micrel, inc. SY898535L june 2011 5 m9999-062211-b hbwhelp@micrel.com or (408) 955-1690 ac electrical characteristics ( 6) v cc = 3.3v 5%; r l = 50 ? to v cc -2v; t a = -40c to +85c, unless otherwise stated. symbol parameter condition min typ max units f max maximum operating frequency 235 mhz t pd propagation delay (7) f 266mhz 1.0 1.4 ns output-to-output skew (8) 11 30 ps t skew part-to-part skew (9) 250 ps t jitter additive phase jitter (10) 0.09 ps rms t r, t f output rise/fall time 20% to 80% @ 50mhz 300 700 ps odc output duty cycle 48 50 52 % notes: 6. high-frequency ac-parameters are guar anteed by design and characterization. 7. measured from v cc /2 of the input to the differential output crossing point. 8. defined as skew between outputs at the same supply volt age and with equal load conditions. measured at the output different ial cross points. 9. defined as skew between outputs on differ ent devices operating at the same suppl y voltages and with equal load conditions. u sing the same type of inputs on each device, the outputs are measured at the differential cross points. 10. driving only one input clock.
micrel, inc. SY898535L june 2011 6 m9999-062211-b hbwhelp@micrel.com timing diagrams figure 1a. clk_en timing diagram figure 1b. propagation delay figure 1c. output-to-output skew or (408) 955-1690
micrel, inc. SY898535L june 2011 7 m9999-062211-b hbwhelp@micrel.com package information 20-pin tssop (k4-20-1) micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. no license, whether expre ss, implied, arising by estoppel or other wise, to any intellectual property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including l iability or warranties relating to fitness for a particular purpose, merchantability, or infringement of an y patent, copyright or other intellectual p roperty right. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a product reasonably be expected to result in pers onal injury. life support devices or system s are devices or systems that (a) are in tended for surgical impla into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significan t injury to the user. a purchaser?s use or sale of micrel produc ts for use in life support app liances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. can nt ? 2011 micrel, incorporated. or (408) 955-1690
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